1. Field of the Invention
The present invention generally relates to a semiconductor device, and particularly, to a non-volatile memory and an operating method thereof.
2. Description of Related Art
Currently, silicon on insulation (SOI) structures are often used as substrates of semiconductor devices. An SOI structure typically contains an insulation layer, e.g., a silicon dioxide layer, disposed adjacent to a surface of the silicon substrate material so as to isolate a silicon body layer for fabricating semiconductor devices from a silicon substrate, and in this manner it is named as silicon on insulation. In such an SOI structure, because an area in which the semiconductor device is configured is isolated from the silicon substrate, paths of transistors in an active area causing latching up, e.g., connection between source and substrate, well and substrate, are eliminated by the insertion of the insulation layer therebetween, thus avoiding latching up problems therebetween.
This SOI technique for fabricating IC has the advantages such as: electrically, it prevents a problem of congenital interface capacitance parasitism of device of a bulk silicon wafer; and it not only effectively depresses latching up problems caused by parasitic bipolar effect of the semiconductor device, but also improves immunity of the semiconductor device to soft errors caused by α Particles.
Non-volatile memory devices, having the advantage of storing data therein which would not be lost when power supply is turned off, become widely adopted by person computers and electronic equipments.
A typical non-volatile memory device uses a doped polysilicon for fabricating a floating gate and a control gate, which also constitute a stack structure. There is an insulation layer disposed between the floating gate and the substrate, and between the floating gate and the control gate, respectively.
U.S. Pat. No. 6,115,287 discloses a non-volatile memory device fabricated on an SOI substrate. However, with respect to such a memory device, electrons generated in an impact ionization process will accumulate at a bottom of the silicon body layer. Therefore, the potential at the silicon body layer gradually shifting from original designated value so that the threshold voltage of the memory cell is caused to have variations, which affects the programming operation.